first instructiom
This commit is contained in:
Richard
parent
3181d2c80d
commit
f74be7dbbf
245
Cargo.lock
generated
245
Cargo.lock
generated
@ -1,16 +1,251 @@
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# This file is automatically @generated by Cargo.
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# It is not intended for manual editing.
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||||
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|
||||
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||||
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dependencies = [
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||||
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||||
"once_cell_polyfill",
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||||
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||||
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||||
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[[package]]
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||||
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"clap_builder",
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||||
"clap_derive",
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]
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||||
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||||
[[package]]
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||||
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dependencies = [
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"anstream",
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||||
dependencies = [
|
||||
"heck",
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||||
"proc-macro2",
|
||||
"quote",
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||||
"syn",
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||||
]
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[[package]]
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||||
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[[package]]
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"quote",
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[[package]]
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]
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[[package]]
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name = "ux"
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||||
[[package]]
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name = "utf8parse"
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||||
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[[package]]
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[[package]]
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name = "windows-sys"
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dependencies = [
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dependencies = [
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||||
"windows-link",
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||||
"windows_aarch64_gnullvm",
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||||
"windows_aarch64_msvc",
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"windows_i686_gnu",
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"windows_i686_gnullvm",
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"windows_i686_msvc",
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"windows_x86_64_gnu",
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"windows_x86_64_gnullvm",
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"windows_x86_64_msvc",
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]
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[[package]]
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name = "windows_aarch64_gnullvm"
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version = "0.53.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "86b8d5f90ddd19cb4a147a5fa63ca848db3df085e25fee3cc10b39b6eebae764"
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||||
[[package]]
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name = "windows_aarch64_msvc"
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version = "0.53.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "c7651a1f62a11b8cbd5e0d42526e55f2c99886c77e007179efff86c2b137e66c"
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||||
[[package]]
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||||
name = "windows_i686_gnu"
|
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version = "0.53.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "c1dc67659d35f387f5f6c479dc4e28f1d4bb90ddd1a5d3da2e5d97b42d6272c3"
|
||||
|
||||
[[package]]
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name = "windows_i686_gnullvm"
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version = "0.53.0"
|
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "9ce6ccbdedbf6d6354471319e781c0dfef054c81fbc7cf83f338a4296c0cae11"
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||||
|
||||
[[package]]
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name = "windows_i686_msvc"
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version = "0.53.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "581fee95406bb13382d2f65cd4a908ca7b1e4c2f1917f143ba16efe98a589b5d"
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||||
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[[package]]
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name = "windows_x86_64_gnu"
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version = "0.53.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "2e55b5ac9ea33f2fc1716d1742db15574fd6fc8dadc51caab1c16a3d3b4190ba"
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|
||||
[[package]]
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name = "windows_x86_64_gnullvm"
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version = "0.53.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "0a6e035dd0599267ce1ee132e51c27dd29437f63325753051e71dd9e42406c57"
|
||||
|
||||
[[package]]
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||||
name = "windows_x86_64_msvc"
|
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version = "0.53.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
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||||
checksum = "271414315aff87387382ec3d271b52d7ae78726f5d44ac98b4f4030c91880486"
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@ -4,4 +4,4 @@ version = "0.1.0"
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edition = "2021"
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[dependencies]
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ux = "0.1.6"
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clap = { version = "4.5.45", features = [ "derive" ] }
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256
data/um.asm
Normal file
256
data/um.asm
Normal file
@ -0,0 +1,256 @@
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ORT r5=0x12
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CMV r0=r0 if r0
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CMV r0=r0 if r0
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||||
CMV r0=r0 if r0
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||||
CMV r0=r0 if r0
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CMV r0=r0 if r0
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CMV r0=r0 if r0
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CMV r0=r0 if r0
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ORT r0=0x100
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ORT r2=0x7
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ORT r3=0x1ffffff
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ADD r4=r3+r7
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NAD r3=r1 nand r3
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NAD r3=r3 nand r3
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DIV r1=r1/r4
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NAD r1=r2 nand r1
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NAD r1=r1 nand r1
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AMD r6[r1]=r3
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IDX r1=r6[r0]
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ORT r7=0x1
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ADD r0=r7+r0
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ORT r3=0xff
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IDX r3=r6[r3]
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DIV r3=r1/r3
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ORT r4=0x1c
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ADD r4=r4+r3
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IDX r4=r6[r4]
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LOD r6@r4
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CMV r0=r5 if r2
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CMV r0=r7 if r1
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CMV r1=r3 if r2
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CMV r1=r7 if r3
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CMV r2=r1 if r1
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CMV r2=r2 if r7
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CMV r2=r4 if r5
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CMV r2=r6 if r3
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CMV r2=r6 if r4
|
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CMV r3=r0 if r0
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CMV r3=r0 if r5
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CMV r3=r1 if r2
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CMV r3=r1 if r7
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CMV r0=r1 if r2
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ORT r7=0x8
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DIV r4=r1/r7
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DIV r3=r4/r7
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NAD r4=r4 nand r2
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NAD r4=r4 nand r4
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NAD r3=r3 nand r2
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NAD r3=r3 nand r3
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NAD r7=r1 nand r2
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NAD r7=r7 nand r7
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||||
IDX r7=r6[r7]
|
||||
IDX r1=r6[r3]
|
||||
IDX r4=r6[r4]
|
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CMV r1=r4 if r7
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AMD r6[r3]=r1
|
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LOD r6@r5
|
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ORT r3=0x8
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||||
DIV r3=r1/r3
|
||||
NAD r3=r2 nand r3
|
||||
NAD r3=r3 nand r3
|
||||
IDX r3=r6[r3]
|
||||
ORT r4=0x4e
|
||||
ORT r7=0x42
|
||||
CMV r7=r4 if r3
|
||||
LOD r6@r7
|
||||
NAD r3=r1 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r3=r6[r3]
|
||||
ORT r7=0x100
|
||||
ADD r3=r7+r3
|
||||
IDX r3=r6[r3]
|
||||
ORT r4=0x40
|
||||
DIV r4=r1/r4
|
||||
NAD r4=r2 nand r4
|
||||
NAD r4=r4 nand r4
|
||||
AMD r6[r4]=r3
|
||||
LOD r6@r5
|
||||
NAD r4=r1 nand r2
|
||||
NAD r4=r4 nand r4
|
||||
IDX r4=r6[r4]
|
||||
ORT r7=0x1
|
||||
ADD r4=r7+r4
|
||||
IDX r3=r3[r4]
|
||||
ORT r4=0x40
|
||||
DIV r4=r1/r4
|
||||
NAD r4=r2 nand r4
|
||||
NAD r4=r4 nand r4
|
||||
AMD r6[r4]=r3
|
||||
LOD r6@r5
|
||||
ORT r3=0x40
|
||||
DIV r3=r1/r3
|
||||
NAD r3=r2 nand r3
|
||||
NAD r3=r3 nand r3
|
||||
IDX r3=r6[r3]
|
||||
ORT r4=0x6f
|
||||
ORT r7=0x63
|
||||
CMV r7=r4 if r3
|
||||
LOD r6@r7
|
||||
NAD r3=r1 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r3=r6[r3]
|
||||
ORT r4=0x8
|
||||
DIV r4=r1/r4
|
||||
NAD r4=r2 nand r4
|
||||
NAD r4=r4 nand r4
|
||||
IDX r4=r6[r4]
|
||||
ORT r7=0x100
|
||||
ADD r4=r7+r4
|
||||
AMD r6[r4]=r3
|
||||
LOD r6@r5
|
||||
ORT r4=0x8
|
||||
DIV r4=r1/r4
|
||||
NAD r4=r2 nand r4
|
||||
NAD r4=r4 nand r4
|
||||
IDX r4=r6[r4]
|
||||
ORT r7=0x1
|
||||
ADD r4=r7+r4
|
||||
NAD r7=r1 nand r2
|
||||
NAD r7=r7 nand r7
|
||||
IDX r7=r6[r7]
|
||||
AMD r3[r4]=r7
|
||||
LOD r6@r5
|
||||
ORT r7=0x8
|
||||
DIV r4=r1/r7
|
||||
DIV r3=r4/r7
|
||||
NAD r4=r4 nand r2
|
||||
NAD r4=r4 nand r4
|
||||
NAD r3=r3 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r4=r6[r4]
|
||||
NAD r7=r1 nand r2
|
||||
NAD r7=r7 nand r7
|
||||
IDX r7=r6[r7]
|
||||
ADD r4=r4+r7
|
||||
AMD r6[r3]=r4
|
||||
LOD r6@r5
|
||||
ORT r7=0x8
|
||||
DIV r4=r1/r7
|
||||
DIV r3=r4/r7
|
||||
NAD r4=r4 nand r2
|
||||
NAD r4=r4 nand r4
|
||||
NAD r3=r3 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r4=r6[r4]
|
||||
NAD r7=r1 nand r2
|
||||
NAD r7=r7 nand r7
|
||||
IDX r7=r6[r7]
|
||||
MUL r4=r4*r7
|
||||
AMD r6[r3]=r4
|
||||
LOD r6@r5
|
||||
ORT r7=0x8
|
||||
DIV r4=r1/r7
|
||||
DIV r3=r4/r7
|
||||
NAD r4=r4 nand r2
|
||||
NAD r4=r4 nand r4
|
||||
NAD r3=r3 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r4=r6[r4]
|
||||
NAD r7=r1 nand r2
|
||||
NAD r7=r7 nand r7
|
||||
IDX r7=r6[r7]
|
||||
DIV r4=r4/r7
|
||||
AMD r6[r3]=r4
|
||||
LOD r6@r5
|
||||
ORT r7=0x8
|
||||
DIV r4=r1/r7
|
||||
DIV r3=r4/r7
|
||||
NAD r4=r4 nand r2
|
||||
NAD r4=r4 nand r4
|
||||
NAD r3=r3 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r4=r6[r4]
|
||||
NAD r7=r1 nand r2
|
||||
NAD r7=r7 nand r7
|
||||
IDX r7=r6[r7]
|
||||
NAD r4=r4 nand r7
|
||||
AMD r6[r3]=r4
|
||||
LOD r6@r5
|
||||
HLT
|
||||
NAD r3=r1 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r3=r6[r3]
|
||||
ADD r7=r7+r3
|
||||
ALC r4 r7
|
||||
AMD r4[r6]=r3
|
||||
ORT r3=0x8
|
||||
DIV r3=r1/r3
|
||||
NAD r3=r2 nand r3
|
||||
NAD r3=r3 nand r3
|
||||
AMD r6[r3]=r4
|
||||
LOD r6@r5
|
||||
NAD r3=r1 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
IDX r3=r6[r3]
|
||||
ABN r3
|
||||
LOD r6@r5
|
||||
NAD r4=r1 nand r2
|
||||
NAD r4=r4 nand r4
|
||||
IDX r4=r6[r4]
|
||||
OUT r4
|
||||
LOD r6@r5
|
||||
INP r4
|
||||
NAD r3=r1 nand r2
|
||||
NAD r3=r3 nand r3
|
||||
AMD r6[r3]=r4
|
||||
LOD r6@r5
|
||||
ORT r4=0x8
|
||||
DIV r4=r1/r4
|
||||
NAD r4=r2 nand r4
|
||||
NAD r4=r4 nand r4
|
||||
IDX r4=r6[r4]
|
||||
ORT r0=0xde
|
||||
ORT r3=0xd8
|
||||
CMV r3=r0 if r4
|
||||
LOD r6@r3
|
||||
NAD r0=r1 nand r2
|
||||
NAD r0=r0 nand r0
|
||||
IDX r0=r6[r0]
|
||||
ORT r7=0x100
|
||||
ADD r0=r0+r7
|
||||
LOD r6@r5
|
||||
ORT r2=0x100
|
||||
IDX r5=r4[r6]
|
||||
ADD r3=r5+r2
|
||||
ALC r3 r3
|
||||
ORT r0=0xec
|
||||
ORT r7=0xe6
|
||||
CMV r0=r7 if r2
|
||||
LOD r6@r0
|
||||
NAD r7=r6 nand r6
|
||||
ADD r2=r7+r2
|
||||
IDX r0=r6[r2]
|
||||
AMD r3[r2]=r0
|
||||
ORT r0=0xe2
|
||||
LOD r6@r0
|
||||
ORT r0=0xf8
|
||||
ORT r2=0xf0
|
||||
CMV r0=r2 if r5
|
||||
LOD r6@r0
|
||||
IDX r0=r4[r5]
|
||||
NAD r7=r6 nand r6
|
||||
ADD r5=r7+r5
|
||||
ORT r7=0x100
|
||||
ADD r7=r5+r7
|
||||
AMD r3[r7]=r0
|
||||
ORT r0=0xec
|
||||
LOD r6@r0
|
||||
ORT r2=0x7
|
||||
NAD r0=r1 nand r2
|
||||
NAD r0=r0 nand r0
|
||||
IDX r0=r6[r0]
|
||||
ADD r0=r0+r7
|
||||
ORT r5=0x12
|
||||
LOD r3@r5
|
||||
IDX r0=r0[r0]
|
||||
56
src/bin/um.rs
Normal file
56
src/bin/um.rs
Normal file
@ -0,0 +1,56 @@
|
||||
extern crate um;
|
||||
use um::cpu::{Cpu};
|
||||
use std::io;
|
||||
use std::io::prelude::*;
|
||||
use std::fs::File;
|
||||
use std::vec::Vec;
|
||||
use clap::Parser;
|
||||
|
||||
/// Run a um program
|
||||
#[derive(Parser)]
|
||||
struct Cli {
|
||||
/// The path to the program to load
|
||||
program: std::path::PathBuf,
|
||||
}
|
||||
|
||||
|
||||
fn main() -> io::Result<()> {
|
||||
let args = Cli::parse();
|
||||
|
||||
let mut pgm = Vec::new();
|
||||
|
||||
let mut f = File::open(args.program)?;
|
||||
let mut cont = true;
|
||||
while cont {
|
||||
let mut buffer = [0u8; 4];
|
||||
cont = match f.read(&mut buffer) {
|
||||
Ok(4) => {
|
||||
let num = u32::from_be_bytes(
|
||||
buffer.try_into().unwrap());
|
||||
pgm.push(num);
|
||||
true
|
||||
},
|
||||
Ok(_) => false,
|
||||
Err(_) => false,
|
||||
};
|
||||
}
|
||||
|
||||
let mut c = Cpu::new(pgm);
|
||||
cont = true;
|
||||
println!("start\n{}", c.state());
|
||||
while cont {
|
||||
let r = c.step();
|
||||
cont = match r {
|
||||
Ok(_) => {
|
||||
println!("ok\n{}", c.state());
|
||||
true
|
||||
},
|
||||
Err(e) => {
|
||||
println!("Error {:?}", e);
|
||||
false
|
||||
}
|
||||
};
|
||||
}
|
||||
Ok(())
|
||||
|
||||
}
|
||||
124
src/cpu.rs
Normal file
124
src/cpu.rs
Normal file
@ -0,0 +1,124 @@
|
||||
use std::collections::HashMap;
|
||||
use std::vec::Vec;
|
||||
use crate::instruction::{Instruction, NormalInstruction, SpecialInstruction};
|
||||
|
||||
|
||||
#[derive(Debug)]
|
||||
pub enum CpuError {
|
||||
ProgramEnd,
|
||||
InvalidInstruction,
|
||||
UnexpectedInput
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct Cpu {
|
||||
reg: [u32; 8],
|
||||
arr: HashMap<u32, Vec<u32>>,
|
||||
finger: u32,
|
||||
out: Option<u8>,
|
||||
in_reg: Option<u8>
|
||||
}
|
||||
|
||||
|
||||
impl Cpu {
|
||||
pub fn new(pgm: Vec<u32>) -> Cpu {
|
||||
let mut arrays = HashMap::new();
|
||||
arrays.insert(0, pgm);
|
||||
Cpu {
|
||||
reg: [0;8],
|
||||
arr: arrays,
|
||||
finger: 0,
|
||||
in_reg: None,
|
||||
out: None
|
||||
}
|
||||
}
|
||||
|
||||
fn ins(&self) -> Result<Instruction,CpuError> {
|
||||
if self.finger as usize >= self.arr[&0].len() {
|
||||
return Err(CpuError::ProgramEnd);
|
||||
}
|
||||
let d = self.arr[&0][self.finger as usize];
|
||||
if let Ok(i) = Instruction::parse(d) {
|
||||
Ok(i)
|
||||
} else {
|
||||
Err(CpuError::InvalidInstruction)
|
||||
}
|
||||
|
||||
}
|
||||
pub fn output(&self) -> Option<u8> {
|
||||
self.out
|
||||
}
|
||||
|
||||
pub fn expecting_input(&self) -> bool {
|
||||
match self.in_reg {
|
||||
None => false,
|
||||
Some(_) => true
|
||||
}
|
||||
}
|
||||
|
||||
pub fn set_in(&mut self, value: u8) -> Result<(), CpuError> {
|
||||
match self.in_reg {
|
||||
None => Err(CpuError::UnexpectedInput),
|
||||
Some(i) => {
|
||||
self.reg[i as usize] = value as u32;
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub fn state(&self) -> String {
|
||||
let istr = match self.ins() {
|
||||
Ok(i) => i.fmt(),
|
||||
Err(e) => format!("{:?}", e)
|
||||
};
|
||||
format!("CPU Reg {:?}\nCPU Finger {}\nCPU Ins {}", self.reg, self.finger, istr)
|
||||
}
|
||||
|
||||
fn handle_ortho(&mut self, i:SpecialInstruction) -> Result<(), CpuError>{
|
||||
self.reg[i.a as usize] = i.v as u32;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn exec(&mut self, instruction: Instruction)-> Result<(), CpuError>{
|
||||
println!("{:?}", instruction);
|
||||
match instruction {
|
||||
Instruction::Ortho(i) => self.handle_ortho(i),
|
||||
_ => Err(CpuError::InvalidInstruction)
|
||||
}
|
||||
}
|
||||
|
||||
pub fn step(&mut self) -> Result<(), CpuError>{
|
||||
self.out = None;
|
||||
self.in_reg = None;
|
||||
let i = self.ins()?;
|
||||
self.exec(i)?;
|
||||
self.finger += 1;
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests{
|
||||
use super::*;
|
||||
|
||||
fn ezop(op:u32, a:u32, b:u32, c:u32) -> u32 {
|
||||
match op {
|
||||
13 => (op & 0xf) << 28 | (a & 7) << 25 | (b & 0x1ffffff),
|
||||
_ => (op & 0xf) << 28 | (a & 7) << 6 | (b & 7) << 3 | (c & 7)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
#[test]
|
||||
fn test_ortho() -> Result<(), String> {
|
||||
let pgm = vec!(ezop(13, 3, 1337, 0));
|
||||
let mut c = Cpu::new(pgm);
|
||||
let result = c.step();
|
||||
assert!(matches!(result, Ok(_)));
|
||||
assert_eq!(c.reg[0], 0);
|
||||
assert_eq!(c.reg[3], 1337);
|
||||
Ok(())
|
||||
}
|
||||
|
||||
}
|
||||
@ -1,19 +1,16 @@
|
||||
|
||||
use ux::{u3, u25};
|
||||
|
||||
pub struct ParsingError;
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct NormalInstruction {
|
||||
pub a: u3,
|
||||
pub b: u3,
|
||||
pub c: u3
|
||||
pub a: u8,
|
||||
pub b: u8,
|
||||
pub c: u8
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct SpecialInstruction {
|
||||
pub a: u3,
|
||||
pub v: u25
|
||||
pub a: u8,
|
||||
pub v: u32
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
@ -34,8 +31,8 @@ pub enum Instruction {
|
||||
Ortho(SpecialInstruction)
|
||||
}
|
||||
|
||||
const fn u3at(d: u32, pos: u8) -> u3 {
|
||||
u3::new(((d >> pos) & 7) as u8)
|
||||
const fn u3at(d: u32, pos: u8) -> u8 {
|
||||
((d >> pos) & 7) as u8
|
||||
}
|
||||
|
||||
impl Instruction {
|
||||
@ -49,21 +46,21 @@ a, i.b, i.c),
|
||||
Instruction::Multiply(i) => format!("MUL r{}=r{}*r{}", i.a, i.b, i.c),
|
||||
Instruction::Divide(i) => format!("DIV r{}=r{}/r{}", i.a, i.b, i.c),
|
||||
Instruction::NotAnd(i) => format!("NAD r{}=r{} nand r{}", i.a, i.b, i.c),
|
||||
Instruction::Halt(i) => format!("HLT"),
|
||||
Instruction::Halt(_i) => format!("HLT"),
|
||||
Instruction::Allocate(i) => format!("ALC r{} r{}", i.b, i.c),
|
||||
Instruction::Abandon(i) => format!("ABN r{}", i.c),
|
||||
Instruction::Output(i) => format!("OUT r{}", i.c),
|
||||
Instruction::Input(i) => format!("INP r{}", i.c),
|
||||
Instruction::Load(i) => format!("LOD r{}@r{}", i.b, i.c),
|
||||
Instruction::Ortho(i) => format!("ORT r{}={}", i.a, i.v)
|
||||
Instruction::Ortho(i) => format!("ORT r{}=0x{:x}", i.a, i.v)
|
||||
}
|
||||
}
|
||||
|
||||
pub const fn parse(d: u32) -> Result<Instruction, ParsingError> {
|
||||
let itype = d >> 28;
|
||||
let (a, b, c, v) = match itype {
|
||||
13 => (u3at(d, 25), u3::new(0), u3::new(0), u25::new(d & 0x1ffffff)),
|
||||
_ => (u3at(d, 6), u3at(d, 3), u3at(d, 0), u25::new(0))
|
||||
13 => (u3at(d, 25), 0, 0, d & 0x1ffffff),
|
||||
_ => (u3at(d, 6), u3at(d, 3), u3at(d, 0), 0)
|
||||
};
|
||||
match itype {
|
||||
0 => Ok(Instruction::ConditionalMove(NormalInstruction{a: a, b: b, c: c})),
|
||||
|
||||
@ -1 +1,2 @@
|
||||
pub mod instruction;
|
||||
pub mod cpu;
|
||||
Loading…
Reference in New Issue
Block a user